CY7C1480V33_11 CYPRESS [Cypress Semiconductor], CY7C1480V33_11 Datasheet - Page 16

• Manufacturer Part Number: CY7C1480V33_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

The SRAM clock input might not be captured correctly if there is
no way in a design to stop (or slow) the clock during a
SAMPLE/PRELOAD instruction. If this is an issue, it is still
possible to capture all other signals and simply ignore the value
of the CLK captured in the boundary scan register.
After the data is captured, the data can be shifted out by putting
the TAP into the Shift-DR state. This places the boundary scan
register between the TDI and TDO balls.
Note that because the PRELOAD part of the command is not
implemented, putting the TAP to the Update-DR state while
performing a SAMPLE/PRELOAD instruction has the same
effect as the Pause-DR command.
TAP Timing
TAP AC Switching Characteristics
Over the Operating Range
Document Number: 38-05283 Rev. *K
Clock
t
t
t
t
Output Times
t
t
Setup Times
t
t
t
Hold Times
t
t
t
Notes
Parameter
TCYC
TF
TH
TL
TDOV
TDOX
TMSS
TDIS
CS
TMSH
TDIH
CH
10. t
11. Test conditions are specified using the load in TAP AC Test Conditions. t
CS
and t
CH
refer to the setup and hold time requirements of latching data from the boundary scan register.
TCK Clock Cycle Time
TCK Clock Frequency
TCK Clock HIGH Time
TCK Clock LOW Time
TCK Clock LOW to TDO Valid
TCK Clock LOW to TDO Invalid
TMS Setup to TCK Clock Rise
TDI Setup to TCK Clock Rise
Capture Setup to TCK Rise
TMS Hold after TCK Clock Rise
TDI Hold after Clock Rise
Capture Hold after Clock Rise
Test M ode Select
[10, 11]
Test Data-Out
Test Data-In
Test Clock
(TM S)
(TDO)
(TCK )
(TDI)
Description
1
t TM SS
t TDIS
2
t TM SH
t TDIH
t TH
DON’T CA RE
R
/t
F
t
TL
= 1 ns.
3
BYPASS
When the BYPASS instruction is loaded in the instruction register
and the TAP is placed in a Shift-DR state, the bypass register is
placed between the TDI and TDO balls. The advantage of the
BYPASS instruction is that it shortens the boundary scan path
when multiple devices are connected together on a board.
Reserved
These instructions are not implemented but are reserved for
future use. Do not use these instructions.
t CY C
UNDEFINED
4
t TDOX
t TDOV
5
Min
50
20
20
–
–
0
5
5
5
5
5
5
6
Max
20
10
CY7C1480V33
CY7C1482V33
CY7C1486V33
–
–
–
–
–
–
–
–
–
–
Page 16 of 36
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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