CY7C1480V33_11 CYPRESS [Cypress Semiconductor], CY7C1480V33_11 Datasheet - Page 13

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CY7C1480V33_11

Manufacturer Part Number
CY7C1480V33_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Truth Table for Read/Write
The following is a Truth Table for Read/Write for the CY7C1486V33.
Document Number: 38-05283 Rev. *K
Note
Read
Read
Write Byte x – (DQ
Write All Bytes
Write All Bytes
9. BWx represents any byte write signal BW[0..7].To enable any byte write BWx, a Logic LOW signal should be applied at clock rise. Any number of bye writes can be
enabled at the same time for any given write.
x
Function
and DQP
x
)
GW
H
H
H
H
L
BWE
[9]
H
X
L
L
L
All BW = H
All BW = L
BW
X
L
X
X
CY7C1480V33
CY7C1482V33
CY7C1486V33
Page 13 of 36
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