CY7C1480V33_11 CYPRESS [Cypress Semiconductor], CY7C1480V33_11 Datasheet - Page 17

• Manufacturer Part Number: CY7C1480V33_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

3.3 V TAP AC Test Conditions
Input pulse levels ...............................................V
Input rise and fall times ...................................................1 ns
Input timing reference levels ......................................... 1.5 V
Output reference levels ................................................ 1.5 V
Test load termination supply voltage ............................ 1.5 V
3.3 V TAP AC Output Load Equivalent
TAP DC Electrical Characteristics and Operating Conditions
(0 °C < T
Identification Register Definitions
Notes
Document Number: 38-05283 Rev. *K
V
V
V
V
V
V
I
Revision Number (31:29)
Device Depth (28:24)
Architecture/Memory Type(23:18)
Bus Width/Density(17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
12. All voltages referenced to V
Parameter
X
OH1
OH2
OL1
OL2
IH
IL
TDO
Instruction Field
A
< +70 °C; V
Output HIGH Voltage
Output HIGH Voltage
Output LOW Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Z = 50Ω
Description
DD
O
SS
= 3.135 to 3.6 V unless otherwise noted)
(GND).
CY7C1480V33
00000110100
(2 M × 36)
000000
100100
01011
1.5V
000
1
I
I
I
I
I
I
GND < V
OH
OH
OH
OL
OL
OL
20pF
50Ω
= 8.0 mA
= 1.0 mA
= 100 µA
= –4.0 mA, V
= –1.0 mA, V
= –100 µA
SS
CY7C1482V33
to 3.3 V
IN
00000110100
(4 M × 18)
< V
000000
010100
01011
000
DDQ
1
Test Conditions
DDQ
DDQ
= 3.3 V
= 2.5 V
[12]
2.5 V TAP AC Test Conditions
Input pulse levels................................................ V
Input rise and fall time .....................................................1 ns
Input timing reference levels........................................ 1.25 V
Output reference levels ............................................... 1.25 V
Test load termination supply voltage ........................... 1.25 V
2.5 V TAP AC Output Load Equivalent
CY7C1486V33
V
V
V
V
V
V
V
V
V
V
00000110100 Enables unique identification of SRAM
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
(1 M × 72)
000000
110100
01011
000
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
1
TDO
Describes the version number
Reserved for internal use
Defines memory type and architecture
Defines width and density
vendor
Indicates the presence of an ID register
Z = 50Ω
O
–0.3
–0.3
Min
2.4
2.0
2.9
2.1
2.0
1.7
–5
–
–
–
–
Description
1.25V
CY7C1480V33
CY7C1482V33
CY7C1486V33
V
V
DD
DD
Max
0.4
0.4
0.2
0.2
0.8
0.7
–
–
–
–
5
+ 0.3
+ 0.3
20pF
50Ω
Page 17 of 36
SS
to 2.5 V
Unit
µA
V
V
V
V
V
V
V
V
V
V
V
V
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