CY7C1470BV33_11 CYPRESS [Cypress Semiconductor], CY7C1470BV33_11 Datasheet - Page 31

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CY7C1470BV33_11

Manufacturer Part Number
CY7C1470BV33_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Acronyms
Document #: 001-15031 Rev. *H
CMOS
FBGA
I/O
JTAG
LSB
LMBU
LSBU
MSB
OE
SEL
SRAM
TAP
TCK
TDI
TDO
TMS
TQFP
TTL
WE
Acronym
complementary metal oxide semiconductor
fine-pitch ball grid array
input/output
Joint Test Action Group
least significant bit
Logical Multi Bit Upsets
Logical Single Bit Upsets
most significant bit
output enable
Single Event Latch up
static random access memory
test access port
test clock
test data-in
test data-out
test mode select
thin quad flat pack
transistor-transistor logic
write enable
Description
Document Conventions
Units of Measure
°C
MHz
µA
µs
mA
mm
ms
ns
%
pF
V
W
Symbol
CY7C1472BV33, CY7C1474BV33
degree Celcius
Mega Hertz
micro Amperes
micro seconds
milli Amperes
milli meter
milli seconds
nano seconds
Ohms
percent
pico Farad
Volts
Watts
Unit of Measure
CY7C1470BV33
Page 31 of 33
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