CY7C1470BV33_11 CYPRESS [Cypress Semiconductor], CY7C1470BV33_11 Datasheet - Page 22

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CY7C1470BV33_11

Manufacturer Part Number
CY7C1470BV33_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied ............................................ –55°C to +125°C
Supply Voltage on V
Supply Voltage on V
DC to Outputs in Tri-State....................–0.5V to V
DC Input Voltage ................................... –0.5V to V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage.......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch Up Current ................................................... > 200 mA
Electrical Characteristics
Over the Operating Range
Notes
Document #: 001-15031 Rev. *H
V
V
V
V
V
V
I
I
16. Overshoot: V
17. T
X
OZ
DD
DDQ
OH
OL
IH
IL
Parameter
power up
: assumes a linear ramp from 0 V to V
IH
(AC) < V
Power Supply Voltage
IO Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current
except ZZ and MODE
Input Current of MODE
Input Current of ZZ
Output Leakage Current GND  V
DD
DDQ
Description
DD
Relative to GND ........–0.5V to +4.6V
+ 1.5 V (pulse width less than t
Relative to GND ...... –0.5V to +V
[16, 17]
[16]
[16]
DD
For 3.3 V IO
For 2.5 V IO
For 3.3 V IO, I
For 2.5 V IO, I
For 3.3 V IO, I
For 2.5 V IO, I
For 3.3 V IO
For 2.5 V IO
For 3.3 V IO
For 2.5 V IO
GND  V
Input = V
Input = V
Input = V
Input = V
(min.) within 200 ms. During this time V
CYC
DDQ
DD
I
SS
DD
SS
DD
I
/2). Undershoot: V
 V
 V
+ 0.5V
+ 0.5V
DDQ
DDQ,
OH
OH
OL
OL
DD
=8.0 mA
=1.0 mA
=1.0 mA
=4.0 mA
Output Disabled
Test Conditions
IL
(AC) > –2 V (pulse width less than t
Operating Range
Neutron Soft Error Immunity
Commercial
Industrial
Parameter Description
LSBU
LMBU
SEL
* No LMBU or SEL events occurred during testing; this column represents a
statistical 
cation Note
Terrestrial Failure Rates”
Range
IH
< V
CY7C1472BV33, CY7C1474BV33
DD
2
, 95% confidence limit calculation. For more details refer to Appli-
AN 54908 “Accelerated Neutron SER Testing and Calculation of
and V
–40 °C to +85 °C
Single Event
Logical Multi
0 °C to +70 °C
Bit Upsets
Temperature
Single Bit
Latch up
DDQ
Logical
Upsets
Ambient
< V
DD
.
CYC
Conditions
/2).
25 °C
25 °C
85 °C
Test
3.3 V– 5% /
3.135
3.135
2.375
–0.3
–0.3
Min
–30
2.4
2.0
2.0
1.7
–5
–5
–5
+10%
CY7C1470BV33
V
DD
Typ
361
V
V
0
0
DD
DD
2.625
Max
V
3.6
0.4
0.4
0.8
0.7
+ 0.3 V
+ 0.3 V
30
2.5 V – 5% to
5
5
5
Page 22 of 33
DD
Max*
0.01
394
0.1
V
V
DDQ
DD
Unit
Unit
FIT/
FIT/
FIT/
Dev
A
A
A
A
A
A
Mb
Mb
V
V
V
V
V
V
V
V
V
V
V
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