PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 99

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PF38F5070M0Q0B0

Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
Numonyx™ StrataFlash
Table 47: Program OTP Register Command Bus Cycles
9.11.3
Figure 51: Example VPP Supply Connections
April 2008
309823-10
Program OTP Register
Attempting to program an OTP register outside of the OTP register space causes a
program error (SR4 = 1). Attempting to program a locked OTP Register causes a
program error and a lock error (SR4 = 1, SR1 = 1).
To read from any of the OTP registers, first issue the Read Device Information
command. Then read from the desired OTP Register address offset. For additional
details, refer to
Global Main-Array Protection
Global main-array protection can be implemented by controlling V
programming or erasing main-array blocks, V
(min). When V
providing absolute protection of the main array.
Various methods exist for controlling V
voltage control.
support program/erase operations and main-array protection.
Command
Factory Programming: VPP = V
Program/Erase Protection: VPP ≤ V
Low-Voltage Programming: VPP = V
Factory Programming: VPP = V
V
V
®
CC
CC
≤ 10ΚΩ
Cellular Memory (M18)
- or-
V
V
PPH
PPH
PP
Section 9.4.3, “Read Device Information” on page
Figure 51
is below V
V
PPL
VCC
VPP
VCC
VPP
Device Address
shows example V
PPLK
PPH
PPH
Address Bus
, program or erase operations are inhibited, thus
PPLK
Setup Write Cycle
PPL
PP
, ranging from simple logic control to off-board
Program/Erase Enable: PROT# = V
Program/Erase Protection: PROT# = V
Low-Voltage Programming: VPP = V
Program/Erase Protection: None
PP
00C0h
PROT#
V
Data Bus
PP
CC
supply connections that can be used to
V
must be equal to, or greater than V
V
CC
PPL
V
PPL
OTP Register Address
Address Bus
VCC
VPP
VCC
VPP
Confirm Write Cycle
PP
82.
. When
IH
CC
IL
Register Data
Data Bus
Datasheet
PPL
99

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