PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 10

• Manufacturer Part Number: PF38F5070M0Q0B0
• Manufacturer: NUMONYX [Numonyx B.V]

2.0
2.1
Table 4:
Datasheet
10
Litho (nm)
90
65
M18 Product Litho/Density/Frequency Combinations
Functional Description
Product Overview
The Numonyx™ StrataFlash
write performance at low voltage on a 16-bit data bus.
The flash memory device has a multi-partition architecture with read-while-program
and read-while-erase capability.
The device supports synchronous burst reads up to 108 MHz using ADV# and CLK
address-latching on some litho/density combinations and up to 133 MHz using CLK
address-latching only on some litho/density combinations. It is listed below in the
following table.
In continuous-burst mode, a data Read can traverse partition boundaries.
Upon initial power-up or return from reset, the device defaults to asynchronous array-
read mode. Synchronous burst-mode reads are enabled by programming the Read
Configuration Register. In synchronous burst mode, output data is synchronized with a
user-supplied clock signal. A WAIT signal provides easy CPU-to-flash memory
synchronization.
Designed for low-voltage applications, the device supports read operations with V
1.8 V, and erase and program operations with V
be tied together for a simple, ultra-low power design. In addition to voltage flexibility, a
dedicated VPP connection provides complete data protection when V
V
A Status Register provides status and error conditions of erase and program
operations.
One-Time-Programmable (OTP) registers allow unique flash device identification that
can be used to increase flash content security. Also, the individual block-lock feature
provides zero-latency block locking and unlocking to protect against unwanted program
or erase of the array.
The flash memory device offers three power savings features:
PPLK
• Automatic Power Savings (APS) mode: The device automatically enters APS
• Standby mode: Standby is initiated when the system deselects the device by
Density (Mbit)
following a read-cycle completion.
deasserting CE#.
.
1024
1024
256
512
128
256
512
Supports frequency up to (MHz)
®
Cellular Memory (M18) device provides high read and
133
108
133
133
133
108
133
Numonyx™ StrataFlash
PP
at 1.8 V or 9.0 V. VCC and VPP can
CLK-latching
ADV#- and CLK-latching
CLK-latching
CLK-latching
CLK-latching
ADV#- and CLK-latching
CLK-latching
Sync read address-latching
®
Cellular Memory (M18)
PP
is less than
309823-10
April 2008
CC
at