PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 71

• Manufacturer Part Number: PF38F5070M0Q0B0
• Manufacturer: NUMONYX [Numonyx B.V]

Numonyx™ StrataFlash
8.0
Table 27: Flash Memory Control Signals
Notes:
1.
2.
8.1
April 2008
309823-10
Reset
Read
Output Disable
Write
Standby
Deep Power-Down
Operation
X = Don’t care (High or Low)
DPD polarity determined by ECR14. Shown low-true here.
NOR Flash Bus Interface
The flash device uses low-true control signal inputs, and is selected by asserting the
chip enable (CE#) input. The output enable (OE#) input is asserted for read
operations, while the write enable (WE#) input is asserted for write operations. OE#
and WE# should never be asserted at the same time; otherwise, indeterminate device
operation will result. All bus cycles to or from the flash memory conform to standard
microcontroller bus cycles.
Commands are written to the device to control all operations.
Table 27
device for the various bus operations.
Bus Reads
To perform a read operation, both CE# and OE# must be asserted; #RST# and WE#
must be deasserted. OE# is the data-output control and when asserted, the output
data is driven on to the data I/O bus. All read operations are independent of the
voltage level on VPP.
The Automatic Power Savings (APS) feature provides low power operation following
reads during active mode. After data is read from the memory array and the address
lines are quiescent, APS automatically places the device into standby. In APS, device
current is reduced to I
The device supports two read configurations:
• Asynchronous reads. RCR15 = 1. This is the default configuration after power-up/
• Synchronous Burst reads. RCR15 = 0.
reset.
— Non-multiplexed devices support asynchronous page-mode reads. AD-
®
Cellular Memory (M18)
Multiplexed devices support only asychronous single-word reads.
shows the logic levels that must be applied to the control-signal inputs of the
RST#
High
High
High
High
High
High
Low
DPD
High
High
High
High
High
High
Low
CCAPS
2
.
CE#
High
High
Low
Low
Low
X
1
OE#
High
High
High
Low
X
X
X
1
WE#
High
High
Low
X
X
X
1
Address
Valid
Valid
Valid
X
X
X
X
1
Data I/O
Output
High-Z
High-Z
High-Z
High-Z
Input
Input
Datasheet
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