PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 69
PF38F5070M0Q0B0
Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Q0B0.pdf
(139 pages)
- Current page: 69 of 139
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Numonyx™ StrataFlash
7.5
Table 25: Reset Specifications
Figure 40: Reset Operation Timing
7.6
Table 26: Deep Power Down Specifications (Sheet 1 of 2)
April 2008
309823-10
Notes:
1.
2.
3.
4.
5.
6.
7.
Nbr.
Nbr.
P1
P2
P3
S1
These specifications are valid for all device versions (packages and speeds).
The device may reset if t
Not applicable if RST# is tied to Vccq.
Sampled, but not 100% tested.
If RST# is tied to the V
If RST# is tied to any supply/signal with V
V
Reset completes within t
CC
t
t
t
t
PLPH
PLRH
VCCPH
(min).
SLSH (
Symbol
Symbol
(A) Reset during
(B) Reset during
(C) Reset during
(D) VCC Power-up to
Reset Specifications
Deep Power Down Specifications
t
SHSL)
read mode
program or block erase
P1 ≤ P2
program or block erase
P1 ≥ P2
RST# high
®
RST# pulse width low
RST# low to device reset during erase
RST# low to device reset during program
V
Cellular Memory (M18)
DPD asserted pulse width
CC
Power valid to RST# de-assertion (high)
CC
PLPH
PLPH
supply, device will not be ready until t
if RST# is asserted while no erase or program operation is executing.
is < t
PLPH MIN
Parameter
Parameter
CCQ
, but this is not guaranteed.
RST# [P]
RST# [P]
RST# [P]
V
CC
voltage levels, the RST# input voltage must not exceed V
V
V
V
V
V
V
V
0V
CC
IH
IH
IH
IL
IL
IL
VCCPH
after V
Min
100
300
—
—
P1
P2
P2
P3
Min
100
CC
Complete
Abort
≥ V
Complete
Abort
CC
Max
25
25
—
min.
Max
—
R5
R5
Unit
ns
µs
R5
Unit
ns
CC
until V
1,2,3,4,7
1,3,4,7
1,3,4,7
1,4,5,6
Notes
Datasheet
Notes
1,2,3
CC
≥
69
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