PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 67

no-image

PF38F5070M0Q0B0

Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
Numonyx™ StrataFlash
Figure 38: Sync Read to Write (AD-Mux)
Notes:
1.
2.
Figure 39: Write to Sync Read (AD-Mux)
Note:
April 2008
309823-10
CLK may be stopped during write cycle.
W22 is the time between the Address-latching-CLK and WE#. In case of ADV#-latching, W21 must be met instead.
CLK may be stopped during write cycle.
A/DQ[15:0]
A/DQ[15:0]
A[Max:16]
A[Max:16]
ADV# [V]
WAIT [T ]
ADV# [V]
WAIT [T]
WE# [W]
WE# [W]
OE# [G]
OE# [G]
CE# [E]
CLK [C]
CE# [E]
CLK
R311
R301
R303
R302
®
R316
R316
A
A
Cellular Memory (M18)
A
A
High-Z
W22
W5
R313
R306
W15
W3
W3
W4
R105
R105
R304
R307
D
W7
W28
W27
R11
R11
W19
Q0
R304
R305
W14
A
A
Q1
R305
R15
R304
R307
R11
R11
Q0
R305
R304
A
A
W22
W5
High-Z
Q1
R305
W15
R304
W4
D
Q2
W7
R305
Datasheet
67

Related parts for PF38F5070M0Q0B0