PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 98
PF38F5070M0Q0B0
Manufacturer Part Number
PF38F5070M0Q0B0
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.PF38F5070M0Q0B0.pdf
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Figure 50: 2-Kbit OTP Registers
Caution:
Datasheet
98
Each register contains OTP bits that can only be programmed from “one” to “zero” -
register bits cannot be erased from “zero” back to “one”. This feature makes the OTP
registers particularly useful for implementing system-level security schemes, for
permanently storing data, or for storing fixed system parameters.
OTP Lock Register bits “lock out” subsequent programming of the corresponding OTP
register. Each OTP Register can be locked by programming its corresponding lock bit to
zero. As long as an OTP register remains unlocked (that is, its lock bit = 1), any of its
remaining “one” bits can be programmed to “zero”.
Once an OTP Register is locked, it cannot be unlocked. Attempts to program a
locked OTP Register will fail with error bits set.
To program any OTP bits, first issue the Program OTP Register setup command at any
device address. Next, write the desired OTP Register data at the desired OTP Register
address. OTP Register and OTP Lock Register programming is performed 16 bits at a
time; only “zeros” within the data word affect any change to the OTP register bits.
0x109
0x102
0x8A
0x91
0x89
0x88
0x85
0x84
0x81
0x80
15 14 13 12 11 10 9
15 14 13 12 11 10 9
128-bit OTP Register 16
128-bit OTP Register 1
128-Bit OTP Register 0
OTP Lock Register 0
OTP Lock Register 1
(User-Programmable)
(User-Programmable)
(Factory-Programmed)
(User-Programmable)
64-bit Segment
64-bit Segment
8
8
7 6
7 6
5
5
4
4
3
3
2
2
1
1
0
0
Numonyx™ StrataFlash
®
Cellular Memory (M18)
309823-10
April 2008
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