PF38F5070M0Q0B0 NUMONYX [Numonyx B.V], PF38F5070M0Q0B0 Datasheet - Page 78

• Manufacturer Part Number: PF38F5070M0Q0B0
• Manufacturer: NUMONYX [Numonyx B.V]

Table 31: Read Configuration Register Bit Definitions
9.2.1
Datasheet
78
Read Configuration Register (RCR)
15
14:11
10
9
8
7:3
2:0
Mode
Read
Bit
15
Read Mode
Latency Count
WAIT Polarity
Reserved
WAIT Delay
Reserved
Burst Length
14
Upon power-up or exit from reset, the Read Configuration Register defaults to
asynchronous mode (RCR15 = 1; RCR[14:11] and RCR[9:0] are ignored).
To read the RCR value, issue the Read Device Information command to the desired
partition. Subsequent reads from the <partition base address> + 05h will output
RCR[15:0] on the data bus.
When using a Latency Count of Code 2 and a Data Hold of two cycles (CR9 = 1), WAIT
must be configured to deassert with valid data (CR8 = 0).
Latency Count
The Latency Count value programmed into RCR[14:11] is the number of valid CLK
edges from address-latch to the start of the data-output delay. When the Latency
Count has been satisfied, output data is driven after tCHQV.
Latency Count
13
Name
12
11
0 = Synchronous burst-mode reads
1 = Asynchronous page-mode reads (default)
Bits:
(Other bit settings are reserved)
0
1
Write 0 to reserved bits
0
1
Write 0 to reserved bits
0
0
1
Polarity
WAIT
= WAIT signal is active low (default)
= WAIT signal is active high
= WAIT de-asserted with valid data
= WAIT de-asserted one cycle before valid data (default)
1
1
1
10
14 13 12 11
0
0
0
0
0
1
1
1
1
1
0
1
1
0
1
1
1
1
0
0
0
0
1
= 8-word burst (wrap only)
= 16-word burst (wrap only)
= Continuous-word burst (no-wrap; default) (Other bit settings
1
0
0
1
1
0
0
1
1
0
are reserved)
1
0
1
0
1
0
1
0
1
0
R
9
= 3
= 4
= 5
= 6
= 7
= 8
= 9
= 10
= 11
= 12
Numonyx™ StrataFlash
WAIT
Delay
8
Description
Reserved
7:3
®
Cellular Memory (M18)
Default: CR15 = 1
2
Burst Length
1
309823-10
April 2008
0