h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 411

• Manufacturer Part Number: h8s-2111b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

15.3.2
Bits 6 to 0 in HICR2 control interrupts from the host interface (LPC) module to the slave
processor (this LSI). Bit 7 in HICR2 and HICR3 monitor host interface pin states.
The pin states can be monitored regardless of the host interface operating state or the operating
state of the functions that use pin multiplexing.
• HICR2
Bit Bit Name
7
6
5
4
GA20
LRST
SDWN
ABRT
Host Interface Control Registers 2 and 3 (HICR2, HICR3)
Initial
Value
Undefined R
0
0
0
Slave Host Description
R/(W)* —
R/(W)* —
R/(W)* —
R/W
—
GA20 Pin Monitor
LPC Reset Interrupt Flag
This bit is a flag that generates an ERRI interrupt when
an LPC hardware reset occurs.
0: [Clearing conditions]
•
1: [Setting condition]
•
LPC Shutdown Interrupt Flag
This bit is a flag that generates an ERRI interrupt when
an LPC hardware shutdown request is generated.
0: [Clearing conditions]
•
•
1: [Setting condition]
•
LPC Abort Interrupt Flag
This bit is a flag that generates an ERRI interrupt when
a forced termination (abort) of an LPC transfer cycle
occurs.
0: [Clearing conditions]
•
•
•
1: [Setting condition]
•
Writing 0 after reading LRST = 1
LRESET pin falling edge detection
Writing 0 after reading SDWN = 1
LPC hardware reset and LPC software reset
LPCPD pin falling edge detection
Writing 0 after reading ABRT = 1
LPC hardware reset and LPC software reset
LPC hardware shutdown and LPC software
shutdown
LFRAME pin falling edge detection during LPC
transfer cycle
Rev. 1.00, 05/04, page 377 of 544