h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 389

• Manufacturer Part Number: h8s-2111b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

14.4
14.4.1
In a receive operation, both KCLK (clock) and KD (data) are outputs on the keyboard side and
inputs on this LSI chip (system) side. KD receives a start bit, 8 data bits (LSB-first), an odd parity
bit, and a stop bit, in that order. The KD value is valid when KCLK is low. A sample receive
processing flowchart is shown in figure 14.3, and the receive timing in figure 14.4.
Operation
Receive Operation
Receive data processing
(receive enabled state)
Receive enabled state
and KDI bits both 1?
Clear KBF flag
Set KBIOE bit
Read KBCRH
Read KBBR
Set KBE bit
KBS = 1?
KBF = 1?
PER = 0?
KCLKI
Start
Figure 14.3 Sample Receive Processing Flowchart
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[6]
Keyboard side in data
Error handling
Execute receive abort
transmission state.
[4]
processing.
[5]
[1] Set the KBIOE bit to 1 in KBCRL.
[2] Read KBCRH, and if the KCLKI
[3] Detect the start bit output on the
[4] When a stop bit is received, the
[5] Perform receive data processing.
[6] Clear the KBF flag to 0 in KBCRL.
The receive operation can be
continued by repeating steps [3] to [6].
Rev. 1.00, 05/04, page 355 of 544
and KDI bits are both 1, set the
KBE bit (receive enabled state).
keyboard side and receive data in
synchronization with the fall of
KCLK.
keyboard buffer controller drives
KCLK low to disable keyboard
transmission (automatic I/O inhibit).
If the KBIE bit is set to 1 in KBCRH,
an interrupt request is sent to the
CPU at the same time.
At the same time, the system
automatically drives KCLK high,
setting the receive enabled state.