h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 226

• Manufacturer Part Number: h8s-2111b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

10.3.4
TCR selects the TCNT clock source and the condition by which TCNT is cleared, and
enables/disables interrupt requests.
TCR_Y can be accessed when the HIE bit in SYSCR is 0 and the TMRX/Y bit in TCONRS is 1.
TCR_X can be accessed when the HIE bit in SYSCR is 0 and the TMRX/Y bit in TCONRS is 0.
Rev. 1.00, 05/04, page 192 of 544
Bit
7
6
5
4
3
2
1
0
Bit Name
CCLR1
CCLR0
CKS2
CKS1
CKS0
CMIEB
CMIEA
OVIE
Timer Control Register (TCR)
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Compare-Match Interrupt Enable B
Selects whether the CMFB interrupt request (CMIB) is
enabled or disabled when the CMFB flag in TCSR is set
to 1. For TMR_X, a CMIB interrupt does not occur
irrespective of the value of this bit.
0: CMFB interrupt request (CMIB) is disabled
1: CMFB interrupt request (CMIB) is enabled
Compare-Match Interrupt Enable A
Selects whether the CMFA interrupt request (CMIA) is
enabled or disabled when the CMFA flag in TCSR is set
to 1. For TMR_X, a CMIA interrupt does not occur
irrespective of the value of this bit.
0: CMFA interrupt request (CMIA) is disabled
1: CMFA interrupt request (CMIA) is enabled
Timer Overflow Interrupt Enable
Selects whether the OVF interrupt request (OVI) is
enabled or disabled when the OVF flag in TCSR is set
to 1. For TMR_X, an OVI interrupt does not occur
irrespective of the value of this bit.
0: OVF interrupt request (OVI) is disabled
1: OVF interrupt request (OVI) is enabled
Counter Clear 1, 0
These bits select the method by which the timer counter
is cleared.
00: Clearing is disabled
01: Cleared on compare-match A
10: Cleared on compare-match B
11: Cleared on rising edge of external reset input
Clock Select 2 to 0
These bits select the clock input to TCNT and count
condition, together with the ICKS1 and ICKS0 bits in
STCR. For details, see table 10.3.