h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 320
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h8s-2111b
Manufacturer Part Number
h8s-2111b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2111B.pdf
(582 pages)
- Current page: 320 of 582
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13.3.4
ICMR sets the communication format and transfer rate. It can only be accessed when the ICE bit
in ICCR is set to 1.
Rev. 1.00, 05/04, page 286 of 544
Bit
7
6
5
4
3
Bit Name
MLS
WAIT
CKS2
CKS1
CKS0
I
2
C Bus Mode Register (ICMR)
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
MSB-First/LSB-First Select
0: MSB-first
1: LSB-first
Set this bit to 0 when the I
Wait Insertion Bit
This bit is valid only in master mode with the I
format.
0: Data and the acknowledge bit are transferred
1: After the fall of the clock for the final data bit (8
For details, see section 13.4.7, IRIC Setting Timing and
SCL Control.
Transfer Clock Select 2 to 0
These bits are used only in master mode.
These bits select the required transfer rate, together with
the IICX1 (IIC_1) and IICX0 (IIC_0) bits in STCR. See
table 13.3.
consecutively with no wait inserted.
clock), the IRIC flag is set to 1 in ICCR, and a wait
state begins (with SCL at the low level). When the
IRIC flag is cleared to 0 in ICCR, the wait ends and
the acknowledge bit is transferred.
2
C bus format is used.
2
C bus
th
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