h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 72
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h8s-2111b
Manufacturer Part Number
h8s-2111b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2111B.pdf
(582 pages)
- Current page: 72 of 582
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Table 2.9
Note:
B: Byte
W: Word
Table 2.10 Block Data Transfer Instructions
Rev. 1.00, 05/04, page 38 of 544
Instruction
TRAPA
RTE
SLEEP
LDC
STC
ANDC
ORC
XORC
NOP
Instruction
EEPMOV.B
EEPMOV.W
*
Size refers to the operand size.
System Control Instructions
Size*
—
—
—
B/W
B/W
B
B
B
—
Size
—
—
Function
Starts trap-instruction exception handling.
Returns from an exception-handling routine.
Causes a transition to a power-down state.
(EAs) → CCR, (EAs) → EXR
Moves the memory operand contents or immediate data to CCR or
EXR. Although CCR and EXR are 8-bit registers, word-size transfers
are performed between them and memory. The upper 8 bits are
valid.
CCR → (EAd), EXR → (EAd)
Transfers CCR or EXR contents to a general register or memory
operand. Although CCR and EXR are 8-bit registers, word-size
transfers are performed between them and memory. The upper 8 bits
are valid.
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR or EXR contents with immediate data.
CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
Logically ORs the CCR or EXR contents with immediate data.
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically exclusive-ORs the CCR or EXR contents with immediate
data.
PC + 2 → PC
Only increments the program counter.
if R4L ≠ 0 then
else next;
if R4 ≠ 0 then
else next;
Transfers a data block. Starting from the address set in ER5,
transfers data for the number of bytes set in R4L or R4 to the
address location set in ER6.
Execution of the next instruction begins as soon as the transfer is
completed.
Function
Repeat @ER5 + → @ER6+
Until R4L = 0
Repeat @ER5 + → @ER6+
Until R4 = 0
R4L–1 → R4L
R4–1 → R4
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