h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 63
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h8s-2111b
Manufacturer Part Number
h8s-2111b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2111B.pdf
(582 pages)
- Current page: 63 of 582
- Download datasheet (4Mb)
2.6
The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function as
shown in table 2.1.
Table 2.1
Notes: B: Byte size; W: Word size; L: Longword size.
Function
Data transfer
Arithmetic
operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer EEPMOV
1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn, @-
2. B
3. Cannot be used in this LSI.
4. When using the TAS instruction, use registers ER0, ER1, ER4, and ER5.
5. ER7 is not used as the register that can be saved (STM)/restored (LDM) when using
Instruction Set
SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L ERn,
@-SP.
STM/LDM instruction, because ER7 is the stack pointer.
CC
Instruction Classification
is the general name for conditional branch instructions.
Instructions
MOV
POP*
LDM*
MOVFPE*
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS*
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL,
ROTXR
BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST,
BAND, BIAND, BOR, BIOR, BXOR, BIXOR
B
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC,
NOP
CC
*
2
, JMP, BSR, JSR, RTS
4
1
5
, PUSH*
, STM*
3
, MOVTPE*
5
1
3
Rev. 1.00, 05/04, page 29 of 544
Size
B/W/L
W/L
L
B
B/W/L
B
B/W/L
L
B/W
W/L
B
B/W/L
B/W/L
B
—
—
—
Types
5
19
4
8
14
5
9
1
Total: 65
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