ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 34

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Supply, reset and clock management
6.6
6.6.1
34/188
SI registers
System integrity (SI) control/status register (SICSR)
Table 11.
Table 12.
SICSR
3:1
Bit
7
6
5
4
0
Res
7
-
WDGRF
LVDRF
AVDIE
Name
AVDF
-
-
SICSR register description
Reset source flags
AVDIE
Reserved, must be kept cleared
Voltage Detector Interrupt Enable
Voltage Detector Flag
LVD Reset Flag
Reserved, must be kept cleared
Watchdog Reset Flag
R/W
6
This bit is set and cleared by software. It enables an interrupt to be generated
when the AVDF flag changes (toggles). The pending interrupt information is
automatically cleared when software enters the AVD interrupt routine
0: AVD interrupt disabled
1: AVD interrupt enabled
This read-only bit is set and cleared by hardware. If the AVDIE bit is set, an
interrupt request is generated when the AVDF bit changes value. Refer to
Figure 17
details.
0: V
1: V
This bit indicates that the last reset was generated by the LVD block. It is set by
hardware (LVD reset) and cleared by software (writing zero). See WDGRF flag
description for more details. When the LVD is disabled by option byte, the LVDRF
bit value is undefined.
This bit indicates that the last reset was generated by the Watchdog peripheral. It is
set by hardware (watchdog reset) and cleared by software (writing zero) or an LVD
reset (to ensure a stable cleared state of the WDGRF flag when CPU starts).
Combined with the LVDRF information, the flag description is given in
External RESET pin
DD
DD
Reset sources
over V
under V
Watchdog
and to
AVDF
LVD
RO
5
IT+(AVD)
IT-(AVD)
Section 6.5.2: AVD (auxiliary voltage detector)
threshold
LVDRF
threshold
R/W
4
Function
3
Reserved
LVDRF
2
-
0
0
1
Reset value: 000x 000x (00h)
1
for additional
WDGRF
Table
ST72324B
X
0
1
WDGRF
R/W
0
12.