ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 110

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

On-chip peripherals
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Figure 59. SCI baud rate and extended prescaler block diagram
Framing error
A framing error is detected when:
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When the framing error is detected:
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The FE bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
f
CPU
The stop bit is not recognized on reception at the expected time, following either a de-
synchronization or excessive noise.
A break is received.
the FE bit is set by hardware
Data is transferred from the Shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
/16
/PR
Extended transmitter prescaler register
Extended receiver prescaler register
Extended prescaler transmitter rate control
SCP1
Extended prescaler receiver rate control
Conventional baud rate generator
SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0
Transmitter rate
Extended prescaler
control
Receiver rate
control
SCIERPR
SCIETPR
SCIBRR
Transmitter
clock
Receiver
clock
ST72324B