ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 111
ST72F324BJ
Manufacturer Part Number
ST72F324BJ
Description
8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST72F324BJ.pdf
(188 pages)
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ST72324B
Note:
Conventional baud rate generation
The baud rate for the receiver and transmitter (Rx and Tx) are set independently and
calculated as follows:
with:
PR = 1, 3, 4 or 13 (see SCP[1:0] bits)
TR = 1, 2, 4, 8, 16, 32, 64,128
(see SCT[2:0] bits)
RR = 1, 2, 4, 8, 16, 32, 64,128
(see SCR[2:0] bits)
All these bits are in the
Example: If f
receive baud rates are 38400 baud.
The baud rate registers MUST NOT be changed while the transmitter or the receiver is
enabled.
Extended baud rate generation
The extended prescaler option gives a very fine tuning on the baud rate, using a 255 value
prescaler, whereas the conventional baud rate generator retains industry standard software
compatibility.
The extended baud rate generator block diagram is described in
The output clock rate sent to the transmitter or to the receiver will be the output from the 16
divider divided by a factor ranging from 1 to 255 set in the SCIERPR or the SCIETPR
register.
The extended prescaler is activated by setting the SCIETPR or SCIERPR register to a value
other than zero. The baud rates are calculated as follows:
with:
ETPR = 1,..,255, see
page 121.
ERPR = 1,.. 255, see
page
120.
CPU
is 8 MHz (normal mode) and if PR = 13 and TR = RR = 1, the transmit and
SCI Extended Transmit Prescaler Division Register (SCIETPR) on
SCI Extended Receive Prescaler Division Register (SCIERPR) on
SCI Baud Rate Register (SCIBRR) on page
Tx =
Tx =
16
(16
*
ETPR*(PR*TR)
f
CPU
*
f
PR)
CPU
*
TR
Rx =
Rx =
16
*
(16
ERPR*(PR*RR)
f
CPU
f
*
CPU
PR)
*
RR
Figure
120.
On-chip peripherals
59.
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