emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 6

• Manufacturer Part Number: emc163sp16k
• Description: 1mx16 Bit Cellularram Ad-mux
• Manufacturer: Emlsi Inc.

GENERAL DESCRIPTION
16Mb CellularRAM products are high-speed, CMOS pseudo-static random access memory developed for low-power, portable
applications. The 16Mb CellularRAM device has a DRAM core organized as 1 Meg x 16 bits. These devices are a variation of the
industry-standard Flash control interface, with a multiplexed address/data bus. The multiplexed address and data functionality
dramatically reduce the required signal count, and increases read/write bandwidth. For seamless operation on a burst Flash bus,
16Mb CellularRAM products incorporate a transparent self refresh mechanism. The hidden refresh requires no additional support
from the system memory controller and has no significant impact on device READ/WRITE performance. Two user accessible control
registers define device operation. The bus configuration register (BCR) defines how the 16Mb CellularRAM device interacts with the
system memory bus and is nearly identical to its counterpart on burst mode Flash devices. The refresh configuration register (RCR) is
used to control how refresh is performed on the DRAM array. These registers are automatically loaded with default settings during
power-up and can be updated anytime during normal operation. Special attention has been focused on standby current consumption
during self refresh. 16Mb CellularRAM products include two mechanisms to minimize standby current. Partial array refresh (PAR)
enables the system to limit refresh to only that part of the DRAM array that contains essential data. Temperature compensated self
refresh (TCSR) uses an onchip sensor to adjust the refresh rate to match the device temperature-the refresh rate decreases at lower
temperatures to minimize current consumption during standby. The system configurable refresh mechanisms are accessed through
the RCR. This 16Mb CellularRAM specification defines the industry-standard CellularRAM1.5 x16 A/D Mux feature set established by
the CellularRAM Workgroup. It includes support for both variable and fixed latency, with three output-device drive-strength settings, a
variety of wrap options, and a device ID register (DIDR).
Figure 1: FUNTIONAL BLOCK DIAGRAM - 1 meg x 16
Note: Functional block diagrams illustrate simplified device operation. See pin descriptions; Bus operations table; and timing diagrams for detailed
information.
ADV#
WAIT
WE#
CRE
OE#
CLK
CE#
UB#
LB#
A[19:16]
Control
Logic
Bus Configuration
Register (BCR)
Refresh Configuration
Register (RCR)
Device ID Register
(DIDR)
Address Decode
Logic
6
Internal
1,024K x 16
DRAM
MEMORY
ARRAY
1Mx16 CellularRAM AD-MUX
External
Input
Output
MUX
and
Buffers
EMC163SP16K
A/DQ[15:8]
A/DQ[7:0]