em784su16am Emlsi Inc., em784su16am Datasheet
em784su16am
Related parts for em784su16am
em784su16am Summary of contents
Page 1
... Document Title 512K x 16 bit Pseudo SRAM Specification Revision History Revision No. History 0.0 -. Initial Draft 1.0 -. EM784SU16AL, EM784SU16AM, EM784SU16AN, EM784SU16AP, EM784SU16AR & EM784SU16AS are unified to EM784SU16Ax changed to I CC1P -. I (Cycle time=Min.) changed to I CC1 -. I (Cycle time=1us) added to DC AND OPERATING CC1 CHARACTERISTICS table in page 5. ...
Page 2
... DECODER DQ0~ Din/Dout BUFFER DQ15 - EM784SU16AL support 8 page mode & DPD - EM784SU16AM support 8 page mode & Non-DPD - EM784SU16AN support 16 page mode & DPD - EM784SU16AP support 16 page mode & Non-DPD - EM784SU16AR support Non-page mode & DPD - EM784SU16AS support Non-page mode & Non-DPD ...
Page 3
... Write enable input VCC ZZ# Low power control VCCQ DQ Data in-out VSS(Q) Ground 0-15 A Address inputs NC 0-18 DNU Do not use Note : ZZ# pin should be connected with VCC in EM784SU16AM, EM784SU16AP, EM784SU16AS. Function Lower byte (DQ ) 0~7 Upper byte (DQ ) 8~15 Power supply I/O power supply No connection 3 EM784SU16Ax 512Kx16 Pseudo Static RAM ...
Page 4
ABSOLUTE MAXIMUM RATINGS Parameter Voltage on Any Pin Relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage Temperature Operating Temperature 1. Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the ...
Page 5
RECOMMENDED DC OPERATING CONDITIONS Parameter Supply voltage Ground Input high voltage Input low voltage - otherwise specified A 2. Overshoot case of pulse width < 20ns CC 3. Undershoot: ...
Page 6
AC OPERATING CONDITIONS Test Conditions (Test Load and Test Input/Output Reference) Input Pulse Level : 0. -0.2V CCQ Input Rise and Fall Time : 5ns Input and Output reference Voltage : V 1) Output Load (See right) : ...
Page 7
TIMING DIAGRAMS READ CYCLE (1) (Address controlled, CS#=OE#=V Address Data Out Previous Data Valid READ CYCLE (2) (ZZ#=WE#=V Address CS# LB#, UB# OE# Data Out NOTES (READ CYCLE and t are defined as the time at ...
Page 8
... HZ BHZ OHZ to output voltage levels not Access device with cycle timing shorter than t 3. This page read cycle(8 page mode) is supported in EM784SU16AL & EM784SU16AM Words access MRC t ...
Page 9
PAGE READ CYCLE (2) (ZZ#=WE#=V Address (A18~A4 Address (A3~A0 CS LB#,UB OE# t OLZ Data High-Z t Out BLZ t LZ NOTES (READ CYCLE and t ...
Page 10
WRITE CYCLE (1) (WE# controlled, ZZ#=V Address CS# LB#,UB# WE# Data In High-Z Data Out WRITE CYCLE (2) (CS# controlled, ZZ#=V Address CS# LB#,UB# WE# Data In Data Out High-Z WRITE CYCLE (3) (UB#/LB# controlled, ZZ#=V Address CS# LB#,UB# WE# ...
Page 11
NOTES (WRITE CYCLE write occurs during the overlap(t transition among low CS# and low WE# with asserting UB# or LB# low for single byte operation or simultaneously asserting UB# and LB# low for word operation. A write ends ...
Page 12
... TIMING WAVEFORM OF POWER UP V (Min CS# ZZ# NOTE ( POWER After Vcc reaches Vcc(Min.) , wait 200us with CS# high. Then you get into the normal operation. 2. ZZ# pin should be connected with VCC in EM784SU16AM, EM784SU16AP, EM784SU16AS. 200us Power Up Mode 12 EM784SU16Ax 512Kx16 Pseudo Static RAM Normal Operation ...
Page 13
MEMORY FUNCTION GUIDE EMX EMLSI Memory 2. Device Type 3. Density 4. Function 5. Technology 6. Operating Voltage 1. Memory Component 2. Device Type 6 --------------- Low ...