emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 50

• Manufacturer Part Number: emc163sp16k
• Description: 1mx16 Bit Cellularram Ad-mux
• Manufacturer: Emlsi Inc.

Figure 37: Burst READ Followed by Asynchronous WRITE
Notes:
1. Nondefault BCR settings for burst READ followed by asynchronous WRITE using ADV#: fixed or variable latency, latency code 2 (3 clocks),
2. When the device is transitioning between asynchronous and variable-latency burst operations, CE# must go HIGH. CE# can stay LOW
WAIT active LOW, WAIT asserted during delay.
when the device is transitioning from fixed-latency burst READs; asynchronous operation begins at the falling edge of ADV#. A refresh opportunity
must be provided every
for longer than 15ns.
A/DQ[15:0]
UB#/LB#
A[19:16]
ADV#
WAIT
WE#
CLK
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
High-Z
t
CEM. A refresh opportunity is satisfied by either of the following two conditions: a) clocked CE# HIGH, or b) CE# HIGH
READ Burst Identified
t
KHTL
Valid Address
t
t
t
CSP
Valid Address
SP
t
SP
(WE# = HIGH)
SP
t
SP
t
SP
t
t
t
t
HD
HD
HD
HD
t
OLZ
V
V
OH
OL
t
KOH
t
BOE
t
ACLK
t
KHTL
t
CLK
Valid Output
50
t
t
KOH
HD
t
HD
t
t
OHZ
HZ
t
CBPH
Note 2
V
V
IH
IL
High-Z
1Mx16 CellularRAM AD-MUX
t
AS
t
t
t
AS
AS
VP
t
t
AVS
AVS
Valid Address
Valid Address
Don’t Care
EMC163SP16K
t
CW
t
BW
t
t
t
AW
AVH
AVH
t
WP
t
VS
t
Valid Input
DW
Undefined
t
WPH
t
DH