emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 29

• Manufacturer Part Number: emc163sp16k
• Description: 1mx16 Bit Cellularram Ad-mux
• Manufacturer: Emlsi Inc.

Partial Array Refresh (RCR[2:0] Default = Full Array Refresh)
The PAR bits restrict refresh operation to a portion of the total memory array. This feature allows the device to reduce standby current by
refreshing only that part of the memory array required by the host system. The refresh options are full array, one-half array, one-quarter
array, one-eighth array, or none of the array. The mapping of these partitions can start at either the beginning or the end of the address
map(See Table 7 and Table 8).
Table 7: Address Patterns for PAR (RCR[4] = 1)
Device Identification Register
The DIDR provides information on the device manufacturer, CellularRAM generation, and the specific device configuration. Table 8
describes the bit fields in the DIDR. This register is read-only. The DIDR is accessed with CRE HIGH and A[19:18] = 01b, or through the
register access software sequence with A/DQ = 0002h on the third cycle.
Table 8: Device Identification Register Mapping
Field name
Bit Field
RCR[2]
Options
0
0
0
0
1
1
1
1
128 words
RCR[1]
Length
0
0
1
1
0
0
1
1
Row Length
DIDR[15]
RCR[0]
Setting
Bit
0b
0
1
0
1
0
1
0
1
Version
One-quarter of die
One-quarter of die
One-eighth of die
One-eighth of die
2nd
Active Section
Device version
DIDR[14:11]
One-half of die
One-half die
None of die
Full Die
Setting
0001b
Bit
Density
16Mb
Device density
DIDR[10:8]
C0000h-FFFFFh
E0000h-FFFFFh
00000h-FFFFFh
00000h-7FFFFh
00000h-3FFFFh
00000h-1FFFFh
80000h-FFFFFh
Address Space
29
0
Setting
000b
Bit
Generation
CellularRAM generation
CR 1.5
DIDR[7:5]
1Mx16 CellularRAM AD-MUX
1 Meg x 16
0 Meg x 16
512 K x 16
512 K x 16
256 K x 16
128 K x 16
256 K x 16
128 K x 16
Size
Setting
010b
Bit
EMC163SP16K
EMLSI
Vendor
DIDR[4:0]
Vendor ID
Density
16Mb
8Mb
4Mb
2Mb
0Mb
8Mb
4Mb
2Mb
01010b
Setting
Bit