emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 12

• Manufacturer Part Number: emc163sp16k
• Description: 1mx16 Bit Cellularram Ad-mux
• Manufacturer: Emlsi Inc.

Burst Mode Operation
Burst mode operations enable high-speed synchronous READ and WRITE operations. Burst operations consist of a multi-clock
sequence that must be performed in an ordered fashion. After CE# goes LOW, the address to access is latched on the rising edge of
the next clock that ADV# is LOW. During this first clock rising edge, WE# indicates whether the operation is going to be a READ (WE#
= HIGH, Figure 5) or WRITE (WE# = LOW, Figure 6).
Figure 5: Burst Mode READ (4-word burst)
Note:
Non-default BCR settings for burst mode READ (4-word burst): Fixed or variable latency;
Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
Diagram in the figure above is representative of variable latency with no refresh collision or fixed-latency access.
A/DQ[15:0]
LB#/UB#
A[19:16]
ADV#
WAIT
WE#
CLK
OE#
CE#
READ Burst Identified
(WE# = HIGH)
Address
Address
Latency Code 2(3 clocks)
D0
D1
D2
12
D3
READ Burst Identified
Don’t Care
(WE# = HIGH)
1Mx16 CellularRAM AD-MUX
Address
Address
EMC163SP16K
Undefined