emc163sp16k Emlsi Inc., emc163sp16k Datasheet - Page 48

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emc163sp16k

Manufacturer Part Number
emc163sp16k
Description
1mx16 Bit Cellularram Ad-mux
Manufacturer
Emlsi Inc.
Datasheet
Figure 35: Burst WRITE Followed by Burst READ
Note:
1. Nondefault BCR settings for burst WRITE followed by burst READ: fixed or variable latency, latency code 2 (3 clocks), WAIT active LOW,
2. A refresh opportunity must be provided every
WAIT asserted during delay.
HIGH, or b) CE# HIGH for longer than 15ns.
A/DQ[15:0]
UB#/LB#
A[19:16]
WAIT
ADV#
WE#
CLK
CE#
OE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
High-Z
t
t
t
Address
Address
SP
t
t
SP
SP
CSP
SP
Valid
Valid
t
t
t
t
HD
HD
HD
HD
t
CLK
t
SP
t
CEM. A refresh opportunity is satisfied by either of the following two conditions: a) clocked CE#
t
SP
D0
t
HD
t
HD
D1
D2
48
D3
t
HD
t
Note 2
CBPH
t
t
t
Address
Address
SP
SP
SP
t
SP
Valid
Valid
t
t
t
t
t
HD
CSP
HD
HD
HD
1Mx16 CellularRAM AD-MUX
V
V
t
t
OH
OL
BOE
ACLK
Output
Valid
Don’t Care
EMC163SP16K
t
KOH
Output
Valid
Output
Valid
Output
Valid
Undefined
High-Z
t
OHZ

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