peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 85

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

4.6.3
The SF multiframe consists of 12 consecutive frames. The first bit of each frame (F-bit)
the TE3-CHATTis used as frame alignment (see following table).
Table 4-7
The Fs-bits are used to get a higher synchronization probability but no CAS - BR
(Channel Associated Signalling - bit robbing) is supported. Only frame alignment is
provided in this mode.
4.6.3.1
In the synchronous state terminal framing (Ft-bits) and multiframing (Fs-bits) are
observed, independently. Further reaction on framing errors depends on the selected
synchronization/resynchronization procedure (via bit RFMR0.SSP):
0
Data Sheet
number
Frame
10
11
12
1
2
3
4
5
6
7
8
9
Terminal frame and multiframe synchronization are combined. Two errors
within 4/5/6 Ft-bits or two errors within 4/5/6 in Fs-bits (via bits RFMR.SSC) will
lead to the asynchronous state for terminal framing and multiframing.
Additionally to the bit FRS.LFA, loss of multiframe alignment is reported via bit
FRS.LMFA. The resynchronization procedure starts with synchronizing upon
the terminal framing. If the pulseframing has been regained, the search for
SF Mode
Synchronization Procedure of the Receiver
SF Multiframe Structure
F-bits
Superframe bit
number
1158
1351
1544
1737
1930
2123
193
386
579
772
965
0
Terminal Framing (Ft) Signaling Framing (Fs)
85
1
0
1
0
1
0
-
-
-
-
-
-
Functional Description
0
0
1
1
1
0
PEB 3456 E
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05.2001