peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 279
peb3456
Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456.pdf
(424 pages)
- Current page: 279 of 424
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Access
Address
Reset Value
C3NC
C3C
CCNA
D3RCOM
DS3 Receive Command Register
Data Sheet
15
0
0
0
: read/write
: 1C4
: 0000
Copy DS3 Error Counters
Values of DS3 background registers are copied to foreground.
Background registers are NOT cleared. Command is self clearing and
completes before next register access is possible i.e. software can write
command and then immediately read the counters without starting a
delay timer.
Note: Usage of this function in not recommend in ’One Second’ error
0
1
Copy and Clear DS3 Error Counters
Values of DS3 background registers are copied to foreground.
Background registers are cleared. Command is self clearing and
completes before next register access is possible i.e. software can write
command and then immediately read the counters without starting a
delay timer.
0
1
Note: Usage of this function in not recommend in ’One Second’ error
Copy Error Counters
Only valid for counters which are not operating in ‘One Second’ error
counter mode. Values of DS2 and DS3 background registers are copied
to foreground. Background registers are NOT cleared. Command is self
0
H
H
(PCI), 62
counter mode (D3RCFG.ECM = ‘1’).
No operation.
Copy background counters to foreground.
No operation.
Copy background counters to foreground. Clear background
counters.
counter mode (D3RCFG.ECM = ‘1’).
0
0
H
(Local bus)
0
0
279
0
0
0
C3NC C3C CNCA CCA FRS
4
Register Description
3
2
PEB 3456 E
1
05.2001
0
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