peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 31

• Manufacturer Part Number: peb3456
• Description: Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
AB3
AC6
Pin No.
FRAME
IRDY
Symbol
Output (O)
Input (I)
s/t/s
s/t/s
31
Frame
FRAME indicates the beginning and end
of an access. FRAME is asserted to
indicate a bus transaction is beginning.
While FRAME is asserted, data transfers
continue. When FRAME is deasserted,
the transaction is in the final phase.
When the TE3-CHATT is bus master,
FRAME is an output. When the TE3-
CHATT is bus slave, FRAME is an input.
FRAME is tri-stated when the TE3-
CHATT is not involved in the current
transaction.
FRAME is updated and sampled on the
rising edge of CLK.
Initiator Ready
IRDY indicates the bus master’s ability to
complete the current data phase of the
transaction. It is used in conjunction with
TRDY. A data phase is completed on any
clock where both IRDY and TRDY are
sampled asserted. During a write, IRDY
indicates that valid data is present on
AD(31:0). During a read, it indicates the
master is prepared to accept data. Wait
cycles are inserted until both IRDY and
TRDY are asserted together.
When the TE3-CHATT is bus master,
IRDY is an output. When the TE3-CHATT
is bus slave, IRDY is an input. IRDY is tri-
stated, when the TE3-CHATT is not
involved in the current transaction.
IRDY is updated and sampled on the
rising edge of CLK.
Function
Pin Description
PEB 3456 E
05.2001