peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 209

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peb3456

Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
TBFTC
RQUEUE
RBTC
Table 8-7
Data Sheet
Coding
0000
0001
0010
0011
0100
0101
0110
0111
1000
B
B
B
B
B
B
B
B
B
Threshold Codings
in DWORDs
Transmit Buffer Forward Threshold Code
Note: Please note that the internal architecture is 32 bit wide. Therefore
TBFTC is a coding for the transmit buffer forward threshold. Please refer
to Table 8-7 for correspondence between code and threshold.
The transmit buffer forward threshold code determines the number of
buffer locations which must be filled until the protocol machine starts
transmission. Nevertheless the transmit buffer forwards data packets to
the protocol machine as soon as a whole packet or the end of a packet
is stored in the transmit buffer.
Receive Interrupt Queue.
This bit field determines the interrupt queue number where channel
interrupts receive will be stored.
Receive Buffer Threshold Code
Note: Please note that the internal architecture is 32 bit wide. Therefore
RBTC is a coding for the receive buffer threshold. Please refer to Table
8-7 for correspondence between code and threshold.
The receive buffer threshold determines the maximum packet size in
DWORDs which will be stored in the internal receive buffer for a specific
channel. When the packet size reaches the receive buffer threshold or a
packet has been completely received, the packet will be forwarded to
system memory.
Threshold
12
16
24
32
40
48
1
4
8
each buffer location corresponds to four data octets.
each buffer location corresponds to four data octets.
RBTC
x
x
x
x
x
x
x
x
x
209
TBRTC
x
x
x
x
x
x
x
x
x
TBFTC
x
x
x
x
x
x
x
x
x
Register Description
PEB 3456 E
TPBL
x
x
x
x
x
x
x
x
x
05.2001

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