peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 60
peb3456
Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456.pdf
(424 pages)
- Current page: 60 of 424
- Download datasheet (5Mb)
•
Figure 4-6
Although the data management unit works 32-bit oriented, it is possible to begin a
transmit data section at an uneven address. The two least significant bits of the transmit
data pointer determine the beginning of the data section and the number of bytes in the
first DWORD of the data section, respectively. In receive direction the address of the
data sections must be DWORD aligned.
4.3.2
Each receive descriptor is initialized by the host CPU and stored in system memory as
part of a linked list. The TE3-CHATT reads a descriptor, when requested to do so from
the host by a receive command or after branching from one receive descriptor to the next
receive descriptor. Each receive descriptor contains four DWORDs, where the first three
DWORDs contain link and packet information and the last DWORD contains status
information. Once the descriptor is processed the status information will be written back
to system memory by the TE3-CHATT (Receive status update). When the TE3-CHATT
Data Sheet
01
11
01
0
0
0
0
0
1
0
0
0
Linked list in system memory in little endian mode
Next Descriptor Pointer
Next Descriptor Pointer
Next Descriptor Pointer
Receive Descriptor
Data Pointer
0
Data Pointer
0
Data Pointer
0
0
0
1
0
2
0
Descriptor Structure
0 0
0 0
0 0
0
0
0
0C
0C
10
09
08
08
H
H
H
H
H
H
03
07
0B
0F
13
H
H
H
H
H
0A
02
06
0E
12
H
H
H
H
H
60
0D
01
05
09
11
H
H
H
H
H
00
04
08
0C
10
14
H
H
H
H
H
H
Functional Description
Data on serial link
0A
0B
0C
0D
CRC
CRC
7E
00
01
02
03
04
05
06
07
08
09
0E
0F
10
11
12
13
14
7E
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
PEB 3456 E
Flag
Flag
CRC
Payload
05.2001
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