peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 383
![no-image](/images/no-image-200.jpg)
peb3456
Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456.pdf
(424 pages)
- Current page: 383 of 424
- Download datasheet (5Mb)
CRC2
CRC Status Counter 2
Access
Address
Reset Value
CRC2
Data Sheet
15
: read
: 10
: 0000
CRC2 counter
The S
received bit sequences 0010
specified in register VCRC in every submultiframe on a selectable S
In the primary rate access digital section CRC errors detected at T-
reference points are reported via S
multiframe synchronous state.
The counter is increased with every received bit error indication if
enabled in register RCR2. The counter will not be incremented once it
reaches FFFF
H
H
a
-bit error indication counter CRC2 (16 bits) counts either the
H
. A read will clear this counter.
CRCS(15:0)2
383
B
and 0011
a6
. Incrementing is only possible in the
B
or user programmable values
Register Description
PEB 3456 E
05.2001
a
0
-bit.
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