peb3456 Infineon Technologies Corporation, peb3456 Datasheet - Page 273
peb3456
Manufacturer Part Number
peb3456
Description
Channelized T3 Termination With Ds3 Framer, M13 Multiplexer, T1/ E1 Framers And 256 Channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456.pdf
(424 pages)
- Current page: 273 of 424
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D3TFINS
DS3 Transmit Fault Insertion Control Register
Access
Address
Reset Value
FINSC
Data Sheet
15
0
0
0
: read/write
: 19C
: 0000
Fault Insertion Code.
Fault insertion is service affecting and is intended for testing only. Codes
are not self clearing, i.e. errors are continuously generated as indicated
until bit cleared. A single FEBE, P, CP, or code violation is guaranteed
to be inserted if the respective code is written and then immediately
cleared.
0
1
2
3
4
5
6
7
8
9
0
H
H
(PCI), 4E
Normal operation (no fault insertion)
Insert FEBE event every multiframe (106 sec).
Insert P-bit errors every 2nd multiframe (212 sec).
Insert CP-bit errors every 2nd multiframe (212 sec).
Insert 4 F-bit errors/multiframe (satisfies 3 out of 15 threshold
trigger).
Insert 5 F-bit errors/multiframe (satisfies 3 out of 7 threshold
trigger).
Insert 3 M-bit errors/multiframe (caution: receiver can frame on
emulator).
Force DS3 output to all ‘0’s.
Insert B3ZS violation/multiframe (violation of alternate polarity
rule).
Insert 3 zero string/multiframe (B3ZS code word suppressed)
0
0
H
(Local bus)
0
0
273
0
0
0
0
Register Description
3
FINSC(3:0)
PEB 3456 E
05.2001
0
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