mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 86

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mc68hc05jb4p

Manufacturer Part Number
mc68hc05jb4p
Description
Mc68hc705jb4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
GENERAL RELEASE SPECIFICATION
10.5.3 USB Interrupt Register 1 (UIR1)
SUSPND — USB Suspend Flag
TXD0IE — Endpoint 0 Transmit Interrupt Enable
RXD0IE — Endpoint 0 Receive Interrupt Enable
TXD0FR — Endpoint 0 Transmit Flag Reset
RXD0FR — Endpoint 0 Receive Flag Reset
TXD1F — Endpoint 1/Endpoint 2 Data Transmit Flag
UIR1
$003A
To save power, this read/write bit should be set by the software if a 3ms con-
stant idle state is detected on USB bus. Setting this bit stops the clock to the
USB and causes the USB module to enter Suspend mode. Unnecessary ana-
log circuitry will be powered down. Software must clear this bit after the
Resume flag (RESUMF) is set while this Resume interrupt flag is serviced.
This read/write bit enables the Transmit Endpoint 0 to generate a USB interrupt
when the TXD0F bit becomes set.
This read/write bit enables the Transmit Endpoint 0 to generate a USB interrupt
when the RXD0F bit becomes set.
Writing a logic 1 to this write only bit will clear the TXD0F bit if it is set.Writing a
logic 0 to TXD0FR has no effect. Reset clears this bit.
Writing a logic 1 to this write only bit will clear the RXD0F bit if it is set.Writing a
logic 0 to RXD0FR has no effect. Reset clears this bit.
This read only bit is shared by Endpoint 1 and Endpoint 2. It is set after the data
stored in the shared Endpoint 1/Endpoint 2 transmit buffer has been sent and
an ACK handshake packet from the host is received. Once the next set of data
is ready in the transmit buffers, software must clear this flag by writing a logic 1
to the TXD1FR bit. To enable the next data packet transmission, TX1E must
also be set. If TXD1F bit is not cleared, a NAK handshake will be returned in
the next IN transaction.
Reset clears this bit. Writing a logic 0 to TXD1F has no effect.
reset:
1 = USB interrupts enabled for Transmit Endpoint 0
0 = USB interrupts disabled for Transmit Endpoint 0
1 = USB interrupts enabled for Receive Endpoint 0
0 = USB interrupts disabled for Receive Endpoint 0
1 = Transmit on Endpoint 1 or Endpoint 2 has occurred
0 = Transmit on Endpoint 1 or Endpoint 2 has not occurred
W
R
TXD1F
BIT 7
0
Freescale Semiconductor, Inc.
Figure 10-22. USB Interrupt Register 1(UIR1)
For More Information On This Product,
= Unimplemented
EOPF
UNIVERSAL SERIAL BUS MODULE
BIT 6
0
Go to: www.freescale.com
RESUMF
February 24, 1999
BIT 5
0
RESUMFR
BIT 4
0
0
TXD1IE
BIT 3
0
EOPIE
BIT 2
0
TXD1FR
BIT 1
0
0
EOPFR
BIT 0
REV
0
0

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