mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 48

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
7.2
7.2.1 Port-A Data Register
PORT-A
Port-A is an 8-bit bi-directional port. The port-A data register is at $0000 and the
data direction register (DDRA) is at $0004. Reset does not affect the data regis-
ters, but clears the data direction registers, thereby returning the port pins to
inputs. Writing a ‘1’ to a DDR bit sets the corresponding port bit to output mode.
Each pin in Port-A has an internal pull-up resistor (50k
individually enabled by writing a ‘1’ to the corresponding bit in the Port-A pull-up
control register at location $0010. PA0 to PA4 have built-in schmitt triggered input
to improve noise immunity.
PA5 to PA7 port pins each has built in high current drive (10mA sink typical) for
direct LED drive. In addition, PA6 and PA7 each has optional 25mA drive which
can be enabled by Mask Option. To minimize EME (Electro-Magnetic Emission)
noise, PA6 and PA7 has slow output transition which can be enabled by writing a
‘1’ to bit-7 of the Port-B data direction register at location $0005.
PA0 to PA3 and PA4 can be used to generate IRQ and IRQ2 interrupts respec-
tively. PA0 to PA3 and PA4 cannot generate interrupts via IRQ and IRQ2 if these
port pins are configured as output pins.
If the pull-up device is enabled and the port pin is configured as output, the output
port becomes an open-drain output with 50k pull-up.
Enabling or disabling the SLOW edge function on PA6 and PA7 does not change
the pin configuration. Reading from an output pin will return the content of the
data register.
PTA
$0000
reset:
W
R
Port-A PURX
BIT 7
PA7
0
0
0
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
BIT 6
PA6
0
Port-A DDRX
Go to: www.freescale.com
INPUT/OUTPUT PORTS
0
1
0
1
February 24, 1999
BIT 5
PA5
0
NOTE
Open-drain Output with 50k pull-up
BIT 4
PA4
0
Input with 50k pull-up
Pin Configuration
Output Push/Pull
BIT 3
PA3
Input
0
BIT 2
PA2
0
typical) which can be
BIT 1
PA1
0
BIT 0
PA0
REV
0