mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 3

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Section
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
2.1
2.2
2.3
2.4
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
4.1
4.2
4.3
4.4
MC68HC05JB4
REV 2
FEATURES ...................................................................................................... 1-1
MASK OPTIONS.............................................................................................. 1-2
MCU STRUCTURE.......................................................................................... 1-2
FUNCTIONAL PIN DESCRIPTION.................................................................. 1-4
I/O AND CONTROL REGISTERS ................................................................... 2-2
RAM ................................................................................................................. 2-2
ROM................................................................................................................. 2-2
I/O REGISTERS SUMMARY ........................................................................... 2-3
REGISTERS .................................................................................................... 3-1
ACCUMULATOR (A)........................................................................................ 3-2
INDEX REGISTER (X) ..................................................................................... 3-2
STACK POINTER (SP) .................................................................................... 3-2
PROGRAM COUNTER (PC) ........................................................................... 3-2
CONDITION CODE REGISTER (CCR) ........................................................... 3-3
INTERRUPT VECTORS .................................................................................. 4-1
INTERRUPT PROCESSING............................................................................ 4-2
RESET INTERRUPT SEQUENCE .................................................................. 4-4
SOFTWARE INTERRUPT (SWI) .....................................................................
V
OSC1, OSC2 ............................................................................................... 1-4
RESET......................................................................................................... 1-6
IRQ (MASKABLE INTERRUPT REQUEST)................................................ 1-6
V3.3 ............................................................................................................. 1-6
D+ and D– ................................................................................................... 1-6
PA0-PA7 ...................................................................................................... 1-6
PB0-PB4 ...................................................................................................... 1-7
PC0-PC5...................................................................................................... 1-7
Half Carry Bit (H-Bit) .................................................................................... 3-3
Interrupt Mask (I-Bit) .................................................................................... 3-3
Negative Bit (N-Bit) ...................................................................................... 3-3
Zero Bit (Z-Bit) ............................................................................................. 3-3
Carry/Borrow Bit (C-Bit) ............................................................................... 3-4
DD
AND V
SS
Freescale Semiconductor, Inc.
.............................................................................................. 1-4
For More Information On This Product,
CENTRAL PROCESSING UNIT
GENERAL DESCRIPTION
TABLE OF CONTENTS
Go to: www.freescale.com
February 24, 1999
INTERRUPTS
SECTION 1
SECTION 2
SECTION 3
SECTION 4
MEMORY
GENERAL RELEASE SPECIFICATION
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