mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 62

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
9.4
The result obtained by an input capture will be one count higher than the value of
the free-running timer counter preceding the external transition. This delay is
required for internal synchronization. Resolution is affected by the prescaler,
allowing the free-running timer counter to increment once every four internal clock
cycles (eight oscillator clock cycles).
Reading the ICRH inhibits further captures until the ICRL is also read. Reading
the ICRL after reading the timer status register (TSR) clears the ICF flag bit. does
not inhibit transfer of the free-running counter. There is no conflict between read-
ing the ICRL and transfers from the free-running timer counters. The input capture
registers always contain the free-running timer counter value which corresponds
to the most recent input capture.
To prevent interrupts from occurring between readings of the ICRH and ICRL, set
the I bit in the condition code register (CCR) before reading ICRH and clear the I
bit after reading ICRL.
OUTPUT COMPARE REGISTERS
The Output Compare function is a means of generating an interrupt when the 16-
bit timer counter reaches a selected value as shown in Figure 9-8. Software
writes the selected value into the output compare registers. On every fourth inter-
nal clock cycle (every eight oscillator clock cycle) the output compare circuitry
compares the value of the free-running timer counter to the value written in the
output compare registers. When a match occurs, the output compare interrupt
flag, OCF is set. A timer interrupt request to the CPU is generated if the output
compare interrupt enable is set, i.e. OCIE=1.
Software can use the output compare register to measure time periods, to gener-
ate timing delays, or to generate a pulse of specific duration or a pulse train of
specific frequency and duty cycle.
ICRH
$0014
ICRL
$0015
U = UNAFFECTED BY RESET
reset:
reset:
W
W
R
R
ICRH7
ICRL7
BIT 7
U
U
Figure 9-7. Input Capture Registers (ICRH, ICRL)
Freescale Semiconductor, Inc.
For More Information On This Product,
ICRH6
ICRL6
BIT 6
U
U
Go to: www.freescale.com
February 24, 1999
ICRH5
ICRL5
BIT 5
16-BIT TIMER
U
U
NOTE
ICRH4
ICRL4
BIT 4
U
U
ICRH3
ICRL3
BIT 3
U
U
ICRH2
ICRL2
BIT 2
U
U
ICRH1
ICRL1
BIT 1
U
U
ICRH0
ICRL0
BIT 0
REV
U
U