mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 85

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

10.5.2 USB Interrupt Register 0 (UIR0)
MC68HC05JB4
REV 2
USBEN — USB Module Enable
UADD6-UADD0 — USB Function Address
TXD0F — Endpoint 0 Data Transmit Flag
RXD0F — Endpoint 0 Data Receive Flag
RSTF — USB Reset Flag
UIR0
$0039
This read/write bit enables and disables the USB module and the USB pins.
When USBEN is clear, the USB module will not respond to any tokens. Reset
clears this bit.
These bits specify the USB address of the device. Reset clears these bits.
This read only bit is set after the data stored in Endpoint 0 transmit buffers has
been sent and an ACK handshake packet from the host is received. Once the
next set of data is ready in the transmit buffers, software must clear this flag by
writing a logic 1 to the TXD0FR bit. To enable the next data packet transmis-
sion, TX0E must also be set. If TXD0F bit is not cleared, a NAK handshake will
be returned in the next IN transaction.
Reset clears this bit. Writing a logic 0 to TXD0F has no effect.
This read only bit is set after the USB module has received a data packet and
responded with an ACK handshake packet. Software must clear this flag by
writing a logic 1 to the RXD0FR bit after all of the received data has been read.
Software must also set RX0E bit to one to enable the next data packet recep-
tion. If RXD0F bit is not cleared, a NAK handshake will be returned in the next
OUT transaction.
Reset clears this bit. Writing a logic 0 to RXD0F has no effect.
This read only bit is set when a valid reset signal state is detected on the D+
and D– lines. This reset detection will also generate an internal reset signal to
reset the CPU and other peripherals including the USB module. This bit is
cleared by a POR reset.
reset:
1 = USB function enabled
0 = USB function disabled
1 = Transmit on Endpoint 0 has occurred
0 = Transmit on Endpoint 0 has not occurred
1 = Receive on Endpoint 0 has occurred
0 = Receive on Endpoint 0 has not occurred
W
R
TXD0F
BIT 7
0
Freescale Semiconductor, Inc.
Figure 10-21. USB Interrupt Register 0 (UIR0)
For More Information On This Product,
= Unimplemented
RXD0F
UNIVERSAL SERIAL BUS MODULE
BIT 6
0
Go to: www.freescale.com
February 24, 1999
RSTF
BIT 5
0
SUSPND
BIT 4
0
TXD0IE
GENERAL RELEASE SPECIFICATION
BIT 3
0
RXD0IE
BIT 2
0
TXD0FR
BIT 1
0
0
RXD0FR
BIT 0
0
0