mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 79

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

10.4.3.1 Receiver Data Jitter
10.4.3.2 Data Source Jitter
MC68HC05JB4
REV 2
Figure 10-13. Differential Input Sensitivity Over Entire Common Mode Range
The data receivers for all types of devices must be able to properly decode the
differential data in the presence of jitter. The more of the bit cell that any data edge
can occupy and still be decoded, the more reliable the data transfer will be. Data
receivers are required to decode differential data transitions that occur in a
window plus and minus a nominal quarter bit cell from the nominal (centered) data
edge position.
Jitter will be caused by the delay mismatches and by mismatches in the source
and destination data rates (frequencies). The receive data jitter budget for low
speed is given in the electrical section of the this specification. The specification
includes the consecutive (next) and paired transition values for each source of
jitter.
The source of data can have some variation (jitter) in the timing of edges of the
data
N x T
and T
measured with the same capacitive load used for maximum rise and fall times and
is measured at the crossover points of the data lines as shown in Figure 10-14.
PERIOD
PERIOD
transmitted. The
1.0
0.8
0.6
0.4
0.2
0
is defined as the actual period of the data rate. The data jitter is
0.2
jitter time, where ‘N’ is the number of bits between the transitions
Freescale Semiconductor, Inc.
0.4
For More Information On This Product,
0.6
UNIVERSAL SERIAL BUS MODULE
0.8
Go to: www.freescale.com
COMMON MODE INPUT VOLTAGE (VOLTS)
time
1.0
February 24, 1999
1.2
between
1.4
1.6
1.8
any
2.0
GENERAL RELEASE SPECIFICATION
2.2
set
2.4
2.6
of
2.8
data
3.0
3.2
transitions
is