mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 81

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

10.4.4.1 Data Encoding/Decoding
MC68HC05JB4
REV 2
When transmitting, the control logic handles parallel to serial conversion, CRC
generation, NRZI encoding, and bit stuffing.
When Receiving, the control logic handles Sync detection, packet identification,
end of packet detection, bit (un)stuffing, NRZI decoding, CRC validation, and
serial to parallel conversion. Errors detected by the control logic include bad CRC,
time-out while waiting for EOP, and bit stuffing violations.
The USB employs NRZI data encoding when transmitting packets. In NRZI
encoding, a 1 is represented by no change in level and a 0 is represented by a
change in level. Figure 10-16 shows a data stream and the NRZI equivalent and
Figure 10-17 is a flow diagram for NRZI. The high level represents the J state on
the data lines in this and subsequent figures showing NRZI encoding. A string of
zeros causes the NRZI data to toggle each bit time. A string of ones causes long
periods with no transitions in the data.
DATA
NRZI
IDLE
IDLE
Freescale Semiconductor, Inc.
0
Figure 10-17. Flow Diagram for NRZI
For More Information On This Product,
Figure 10-16. NRZI Data Encoding
TRANSMISSION
1
UNIVERSAL SERIAL BUS MODULE
NO PACKET
TRANSITION
NO DATA
1
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0
NO
February 24, 1999
NO
1
0
IS PACKAGE
POWER UP
FETCH THE
TRANSFER
DATA BIT
BIT = 0?
IS DATA
DONE?
IDLE
1
TRANSMISSION
BEGIN PACKET
0
0
YES
TRANSITION
YES
GENERAL RELEASE SPECIFICATION
DATA
0
1
0
0
1
1
0