mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 93

no-image

mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
PIN LOGIC
RESET
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
PORRST
IRST
R/W
IAB
IDB
SIM RESET STATUS REGISTER
RESET PIN CONTROL
PLL-based or OSC1-based clock output from CGM module
Internal address bus
Internal data bus
Internal reset signal
Read/write signal
Buffered version of OSC1 from clock generator module (CGM)
Phase-locked loop (PLL) circuit output
Signal from the power-on reset module to the SIM
POR CONTROL
(Bus clock = CGMOUT divided by two)
CONTROL
CONTROL
AND PRIORITY DECODE
INTERRUPT CONTROL
Table 7-1. Signal Name Conventions
CLOCK
WAIT
Figure 7-1. SIM Block Diagram
System Integration Module (SIM)
CLOCK GENERATORS
RESET
COUNTER
SIM
2
CONTROL
MASTER
RESET
Description
MODULE WAIT
CPU WAIT (FROM CPU)
SIMOSCEN (TO CGM)
COP CLOCK
CGMXCLK (FROM CGM)
CGMOUT (FROM CGM)
INTERNAL CLOCKS
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
CPU INTERFACE
INTERRUPT SOURCES
System Integration Module (SIM)
Advance Information
93

Related parts for mc68hc908mr24