mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 370

• Manufacturer Part Number: mc68hc908mr24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Analog-to-Digital Converter (ADC)
Advance Information
370
ADICLK — ADC Input Clock Select Bit
MODE1:MODE0 — Modes of Result Justification
ADICLK selects either bus clock or CGMXCLK as the input clock
source to generate the internal ADC clock. Reset selects CGMXCLK
as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz,
CGMXCLK can be used as the clock source for the ADC. If
CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as
the clock source. As long as the internal ADC clock is at f
operation can be guaranteed. See
Converter (ADC)
MODE1:MODE0 selects between four modes of operation. The
manner in which the ADC conversion results will be placed in the ADC
data registers is controlled by these modes of operation. Reset
returns right-justified mode.
1 = Internal bus clock
0 = External clock, CGMXCLK
00 = 8-bit truncation mode
01 = Right justified mode
10 = Left justified mode
11 = Left justified sign data mode
Analog-to-Digital Converter (ADC)
X = don’t care
ADIV2
0
0
0
0
1
Table 19-2. ADC Clock Divide Ratio
f
ADIC
Characteristics.
ADIV1
=
X
0
0
1
1
CGMXCLK or bus frequency
ADIV0
0
1
0
1
X
ADIV[2:0]
21.14 Analog-to-Digital
ADC input clock /1
ADC input clock /2
ADC input clock /4
ADC input clock /8
ADC input clock /16
ADC Clock Rate
MC68HC908MR24
Freescale Semiconductor
ADIC
—
, correct
Rev. 4.1