mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 221

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
11.8.2 TIMA Counter Registers
MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
NOTE:
The two read-only TIMA counter registers contain the high and low bytes
of the value in the TIMA counter. Reading the high byte (TACNTH)
latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL
is read. Reset clears the TIMA counter registers. Setting the TIMA reset
bit (TRST) also clears the TIMA counter registers.
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL
by reading TACNTL before exiting the break interrupt. Otherwise,
TACNTL retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Register Name and Address: TACNTH — $000F
Register Name and Address: TACNTL — $0010
Bit 15
Bit 7
Bit 7
Bit 7
R
R
R
0
0
Timer Interface A (TIMA)
Figure 11-5. TIMA Counter Registers
= Reserved
Bit 14
Bit 6
R
R
6
0
6
0
(TACNTH and TACNTL)
Bit 13
Bit 5
R
R
5
0
5
0
Bit 12
Bit 4
R
R
4
0
4
0
Bit 11
Bit 3
R
R
3
0
3
0
Bit 10
Bit 2
R
R
2
0
2
0
Timer Interface A (TIMA)
Advance Information
Bit 9
Bit 1
R
R
1
0
1
0
Bit 0
Bit 8
Bit 0
Bit 0
R
R
0
0
221

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