ep2sgx30c Altera Corporation, ep2sgx30c Datasheet - Page 309

• Manufacturer Part Number: ep2sgx30c
• Description: Stratix Ii Gx Device Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
October 2007
June 2006, v4.0
Table 4–118. Document Revision History (Part 4 of 5)
Document
Date and
Version
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Updated Table 6–5.
Updated Table 6–6.
Updated all values in Table 6–7.
Added Tables 6–8 and 6–9.
Added Figures 6–1 through 6–4.
Updated Table 6–18.
Updated Tables 6–85 through 6–96.
Added Table 6–80, Stratix II GX Maximum
Output Clock Rate for Dedicated Clock Pins.
Updated Table 6–100.
In “I/O Timing Measurement Methodology”
section, updated Table 6–42.
In “Internal Timing Parameters” section,
updated Tables 6–43 through 6–48.
In “Stratix II GX Clock Timing Parameters”
section, updated Tables 6–50 through 6–65.
In “IOE Programmable Delay” section, updated
Tables 6–67 and 6–68.
In “I/O Delays” section, updated Tables 6–71
through 6–74.
In “Maximum Input & Output Clock Toggle Rate”
section, updated Tables 6–75 through 6–83.
In “DCD Measurement Techniques” section,
updated Tables 6–85 through 6–92.
In “High-Speed I/O Specifications” section,
updated Tables 6–94 through 6–96.
In “External Memory Interface Specifications”
section, updated Table 6–100.
Changes Made
Stratix II GX Device Handbook, Volume 1
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Removed rows for V
V
Updated values for rx, tx, and
refclkb
Removed table containing 1.2-V PCML
I/O information. That information is in
Table 6–7.
Added values to Table 6–100.
DC and Switching Characteristics
O C M
Summary of Changes
from Table 6–5.
in Table 6–6.
I D
, V
O D
, V
I C M
4–139
, and