ep2sgx30c Altera Corporation, ep2sgx30c Datasheet - Page 217

• Manufacturer Part Number: ep2sgx30c
• Description: Stratix Ii Gx Device Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
October 2007
Note to
(1)
V
V
V
V
V
R
V
V
V
V
V
R
Table 4–29. 2.5-V LVDS I/O Specifications
Table 4–30. 3.3-V LVDS I/O Specifications
Symbol
Symbol
CCIO
ID
ICM
OD
OCM
CCIO
ID
ICM
OD
OCM
L
L
The top and bottom clock input differential buffers in I/O banks 3, 4, 7, and 8 are powered by V
The PLL clock output/feedback differential buffers are powered by VCC_PLL_OUT. For differential clock
output/feedback operation, connect VCC_PLL_OUT to 3.3 V.
(1)
Table
I/O supply voltage for left and
right I/O banks (1, 2, 5, and
6)
Input differential voltage
swing (single-ended)
Input common mode voltage
Output differential voltage
(single-ended)
Output common mode
voltage
Receiver differential input
discrete resistor (external to
Stratix II GX devices)
I/O supply voltage for top and
bottom PLL banks (9, 10, 11,
and 12)
Input differential voltage
swing (single-ended)
Input common mode voltage
Output differential voltage
(single-ended)
Output common mode
voltage
Receiver differential input
discrete resistor (external to
Stratix II GX devices)
4–30:
Parameter
Parameter
R
R
R
R
L
L
L
L
= 100 Ω
= 100 Ω
= 100 Ω
= 100 Ω
Conditions
Conditions
Minimum
Minimum
2.375
1.125
3.135
100
200
250
100
200
250
840
Stratix II GX Device Handbook, Volume 1
90
90
DC and Switching Characteristics
Typical
Typical
1,250
1,250
350
100
350
100
2.5
3.3
Maximum
Maximum
CCINT
2.625
1,800
1.375
3.465
1,800
1,570
900
450
110
900
710
110
, not V
CCIO
Unit
Unit
4–47
mV
mV
mV
mV
mV
mV
mV
V
V
Ω
V
Ω
.