ep2sgx30c Altera Corporation, ep2sgx30c Datasheet - Page 251
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ep2sgx30c
Manufacturer Part Number
ep2sgx30c
Description
Stratix Ii Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP2SGX30C.pdf
(314 pages)
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Altera Corporation
October 2007
Note to
(1)
t
t
t
t
t
t
t
t
Clock skew adder
EP2SGX30
Clock skew adder
EP2SGX60
Clock skew adder
EP2SGX90
Clock skew adder
EP2SGX130
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 4–77. EP2SGX130 Column Pins Regional Clock Timing Parameters
Table 4–78. EP2SGX130 Row Pins Regional Clock Timing Parameters
Table 4–79. Clock Network Specifications
Parameter
Parameter
This is in addition to intra-clock network skew, which is modeled in the Quartus II software.
Table
Name
(1)
(1)
(1)
(1)
4–79:
Industrial
Industrial
-0.049
-0.149
-0.144
1.815
1.650
0.116
1.544
1.549
Fast Corner
Fast Corner
Inter-clock network, same side
Inter-clock network, entire chip
Inter-clock network, same side
Inter-clock network, entire chip
Inter-clock network, same side
Inter-clock network, entire chip
Inter-clock network, same side
Inter-clock network, entire chip
Clock Network Skew Adders
The Quartus II software models skew within dedicated clock networks
such as global and regional clocks. Therefore, the intra-clock network
skew adder is not specified.
any two clock networks driving registers in the IOE.
Commercial
Commercial
-0.031
-0.132
-0.127
1.834
1.669
0.134
1.560
1.565
Description
-3 Speed
-3 Speed
Grade
Grade
3.218
3.218
0.349
0.361
3.195
3.195
0.342
0.34
Table 4–79
-4 Speed
-4 Speed
Stratix II GX Device Handbook, Volume 1
Grade
Grade
3.417
3.417
0.364
0.378
3.395
3.395
0.356
0.356
Min
specifies the clock skew between
DC and Switching Characteristics
Typ
-5 Speed
-5 Speed
Grade
Grade
4.087
4.087
0.426
0.444
4.060
4.060
0.417
0.417
Max
±100
±100
±110
±125
±50
±50
±55
±63
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ps
ps
ps
ps
ps
ps
ps
ps
4–81
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