pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 5

• Manufacturer Part Number: pc87317vul
• Description: Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
• Manufacturer: National Semiconductor Corporation

Highlights
1.0
2.0
Signal/Pin Connection and Description
1.1
1.2
Configuration
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
....................................................................................................................................................... 1
CONNECTION DIAGRAM ......................................................................................................... 16
SIGNAL/PIN DESCRIPTIONS ................................................................................................... 17
HARDWARE CONFIGURATION ............................................................................................... 27
2.1.1
2.1.2
2.1.3
SOFTWARE CONFIGURATION ............................................................................................... 28
2.2.1
2.2.2
THE CONFIGURATION REGISTERS ....................................................................................... 29
2.3.1
2.3.2
CARD CONTROL REGISTERS ................................................................................................ 37
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.4.8
2.4.9
KBC CONFIGURATION REGISTER (LOGICAL DEVICE 0) .................................................... 40
2.5.1
FDC CONFIGURATION REGISTERS (LOGICAL DEVICE 3) .................................................. 40
2.6.1
2.6.2
PARALLEL PORT CONFIGURATION REGISTER (LOGICAL DEVICE 4) ............................... 41
2.7.1
UART2 AND INFRARED CONFIGURATION REGISTER (LOGICAL DEVICE 5) .................... 42
2.8.1
UART1 CONFIGURATION REGISTER (LOGICAL DEVICE 6) ................................................ 42
2.9.1
PROGRAMMABLE CHIP SELECT CONFIGURATION REGISTERS ...................................... 42
2.10.1
2.10.2
2.10.3
2.10.4
2.10.5
Wake Up Options ........................................................................................................ 27
The Index and Data Register Pair ............................................................................... 27
The Strap Pins ............................................................................................................. 28
Accessing the Configuration Registers ........................................................................ 28
Address Decoding ....................................................................................................... 28
Standard Plug and Play (PnP) Register Definitions .................................................... 30
Configuration Register Summary ................................................................................ 33
PC87317 SID Register ................................................................................................ 37
PC97317 SID Register ................................................................................................ 37
SuperI/O Configuration 1 Register (SIOC1) ................................................................ 37
SuperI/O Configuration 2 Register (SIOC2) ................................................................ 38
Programmable Chip Select Configuration Index Register ........................................... 38
Programmable Chip Select Configuration Data Register ............................................ 39
SuperI/O Configuration 3 Register (SIOC3) ................................................................ 39
PC97317 SRID Register .............................................................................................. 39
SuperI/O Configuration F Register (SIOCF), Index 2Fh .............................................. 40
SuperI/O KBC Configuration Register ......................................................................... 40
SuperI/O FDC Configuration Register ......................................................................... 40
Drive ID Register ......................................................................................................... 41
SuperI/O Parallel Port Configuration Register ............................................................. 41
SuperI/O UART2 Configuration Register ..................................................................... 42
SuperI/O UART1 Configuration Register ..................................................................... 42
CS0 Base Address MSB Register ............................................................................... 43
CS0 Base Address LSB Register ................................................................................ 43
CS0 Configuration Register ......................................................................................... 43
Reserved ..................................................................................................................... 43
CS1 Base Address MSB Register ............................................................................... 43
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