pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 208
pc87317vul
Manufacturer Part Number
pc87317vul
Description
Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87317VUL.pdf
(272 pages)
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8.7.2
Use this register to control module operation in the Extend-
ed mode. Upon reset all bits are set to 0.
0
7
BTEST
0
1
6
Extended Control Register 1 (EXCR1)
FIGURE 8-22. EXCR1 Register Bitmap
Reserved
0
5
ETDLBK
0
4
Prescaler Value
LOOP
0
0
3
1500000
115200
230400
460800
750000
921600
14400
19200
28800
38400
57600
Baud
134.5
1200
1800
2000
2400
3600
4800
7200
9600
110
150
300
600
0
0
2
50
75
0
0
1
0
Reserved
0
Reset
Required
EXT_SL
Extended Control and
Divisor
Enhanced Serial Port - UART1 (Logical Device 6)
2304
1536
1047
TABLE 8-12. Baud Generator Divisor settings
857
768
384
192
96
64
58
48
32
24
16
12
---
---
---
---
---
8
6
4
3
2
1
Status Register 1
13
Offset 02h
% Error
0.16%
0.16%
0.19%
0.10%
0.16%
0.16%
0.16%
0.16%
0.16%
0.53%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
(EXCR1)
Bank 2,
---
---
---
---
---
208
Divisor
18461
12307
8391
6863
6153
3076
1538
769
512
461
384
256
192
128
96
64
48
32
24
16
---
---
Bit 0 - Extended Mode Select (EXT_SL)
Bits 3 - 1 - Reserved
Bit 4 - Loopback Enable (LOOP)
8
4
2
1
When set to 1, the Extended mode is selected.
Read/Write 0.
During loopback, the transmitter output is connected in-
ternally to the receiver input, to enable system self-test
of serial communications. In addition to the data signal,
all additional signals within the UART are interconnect-
ed to enable real transmission and reception using the
UART mechanisms.
When this bit is set to 1, loopback is selected. This bit
accesses the same internal register as bit 4 in the MCR
register, when the UART is in a Non-Extended mode.
Loopback behaves similarly in both Non-Extended and
Extended modes.
When Extended mode is selected, the DTR bit in the
MCR register internally drives both DSR and RI, and the
RTS bit drives CTS and DCD.
1.625
% Error
0.00%
0.01%
0.01%
0.00%
0.01%
0.03%
0.03%
0.03%
0.16%
0.12%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
---
---
Divisor
30000
20000
13636
11150
10000
5000
2500
1250
833
750
625
416
312
208
156
104
78
52
39
26
13
---
---
---
2
1
1
% Error
0.00%
0.00%
0.00%
0.02%
0.00%
0.00%
0.00%
0.00%
0.04%
0.00%
0.00%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.00%
0.00%
---
---
---
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