pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 211

• Manufacturer Part Number: pc87317vul
• Description: Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
• Manufacturer: National Semiconductor Corporation

8.8.3
This read-only register returns the contents of the FCR reg-
ister in bank 0.
See “FIFO Control Register (FCR)” on page 200 for bit de-
scriptions.
8.8.4
These registers are the same as the registers at offset 03h
in bank 0.
8.9 UART1 REGISTER BITMAPS
0
7
7
7
RXFTH1
0
6
6
6
FIGURE 8-28. SH_LCR Register Bitmap
Shadow of FIFO Control Register (SH_FCR)
Line Control Register (LCR) and Bank Select
Register (BSR)
RXFTH0
0
5
5
5
TXFHT1
0
4
4
4
TXFTH0
0
3
3
3
Transmitted Data
Reserved
0
Received Data
2
2
2
Read Cycles
Write Cycles
TXSR
0
1
1
1
RXSR
0
0
0
0
Reset
Required
FIFO_EN
Reset
Required
Reset
Required
FIFO Control Register
Enhanced Serial Port - UART1 (Logical Device 6)
Transmitter Data
Register (RXD)
Register (TXD)
Receiver Data
Shadow of
Offset 02h
Offset 00h
Offset 00h
(SH_FCR)
Bank 3,
Bank 0,
Bank 0,
211
0
0
7
0
0
0
0
7
7
7
Reserved
FEN1 - FIFO Enabled
0
0
Reserved
6
0
0
0
RXFTH1
6
6
0
6
Reserved
FEN0 - FIFO Enabled
Reserved
0
RXFTH0
5
0
0
0
5
5
0
Non-Extended Modes, Read Cycles
5
TXEMP_IE
0
Extended Mode, Read Cycles
TXFTH1
4
0
0
0
TXEMP-EV
0
4
4
4
Reserved
0
Reserved
Reserved
TXFTH0
3
0
0
0
0
3
3
Reserved
3
MS_IE
0
MS_EV
2
0
0
Reserved
Write Cycles
0
2
2
RXFT - RX_FIFO Time-Out
2
Extended Mode
LS_EV or TXHLT_EV
LS_IE or TXUR_IE
TXSR
0
1
0
0
IPR1 - Interrupt Priority 1
0
1
1
1
TXLDL_EV
TXLDL_IE
0
IPR0 - Interrupt Priority 0
RXSR
0
1
1
0
0
0
0
Reset
Required
RXHDL_EV
Reset
Required
IPF - Interrupt Pending
Reset
Required
RXHDL_IE
Reset
Required
FIFO_EN
Event Identification
Event Identification
Interrupt Enable
Register (FCR)
Register (IER)
Register (EIR)
Register (EIR)
FIFO Control
Offset 01h
Offset 02h
Offset 02h
Offset 02h
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Bank 0,
Bank 0,
Bank 0,
Bank 0,